An increasing number of digital video devices are being developed for use in a variety of applications. Some of these digital video devices include digital video disk (DVD) players, video conferencing systems, and circuits that support enhanced television displays. The circuitry developed to support these digital video devices include graphics display adapters, which process digital video images for display on display devices such as television sets, monitors, and flat panel displays.
In order to allow a variety of digital video devices to be able to connect to and communicate with the graphics display adapters, a video interface port (VIP) standard has been developed to ensure compatibility between different manufacturers. The VIP standard is developed and overseen by the Video Electronics Standards Association (VESA). One of the areas of standardization that the VIP standard provides is in the area of interrupt request servicing. Interrupt requests are generated by digital video devices, or VIP "slave" devices, when they require servicing by the graphics display adapter, or VIP "host".
For example, when a VIP slave such as an MPEG data decoder receives a large amount of data that it needs to relay to the graphics display adapter for display, and does not receive enough memory bandwidth to do so, it may assert an interrupt request. The interrupt request notifies the host central processing unit (CPU) that the MPEG data decoder requires attention. Typically, an interrupt service routine (ISR) within the graphics display adapter will receive the interrupt request and service the MPEG decoder such that system performance is maintained.
Prior art systems provide a hardware connection dedicated to interrupt requests between the digital video devices, or VIP slaves, and the graphics display adapter, or VIP host device. In most cases, the interrupt request signals from all of the VIP slaves in a particular system are merged to provide a single interrupt request signal to the VIP host. This technique is shown in the prior art video graphics system illustrated in FIG. 1. As can be seen in FIG. 1, the first and second VIP slaves are able to assert a shared VIP interrupt request (IRQ) line to the VIP host module. Once the VIP interrupt request line has been asserted, the host CPU must determine which of the VIP slaves has asserted the interrupt request and then service that VIP slave using the VIP bus.
VIP hosts and VIP slaves are typically implemented as separate integrated circuits or groups of integrated circuits and other components. Because of this, one of the drawbacks of the prior art system illustrated in FIG. 1 is the need for the VIP host to have a dedicated pin to receive the interrupt request signal. VIP hosts are often integrated circuits that have a limited number of pins available, and the requirement to have one or more pins dedicated to the receipt of VIP interrupt requests is undesirable.
Other prior art solutions merge the VIP interrupt requests with other interrupt requests such as from the graphics controller and present the merged VIP interrupt request to the CPU via bus structures such as the peripheral component interconnect (PCI) bus or an accelerated graphics port (AGP) bus. Unfortunately, these solutions create additional overhead as the interrupt service routine that services the interrupt request cannot easily determine whether the interrupt was sourced by a VIP slave or by other interrupting entities which are coupled to the bus. Once the interrupt service routine has determined that a VIP slave has asserted the interrupt request, additional processing power must be expended by the CPU to determine which of the VIP slaves has asserted the interrupt. If the interrupt service routine is unable to quickly determine which VIP slave has asserted the interrupt request, the delay incurred and the processing power consumed in determining the source of the interrupt request may cause degradation in system performance.
Therefore, a need exists for a method and apparatus that allows for detection of interrupt requests that does not require a dedicated pin and can be performed without degrading overall system performance.